There the connections are correct. I guess there was a problem when converting the schematics from Altium. Documentation team is informed about the problem.
The Altium conversion explanation makes sense for the margin label, but it doesn’t fully account for the crossed SPI lines — a netlist export wouldn’t normally swap MISO and MOSI unless a net class or harness was misapplied during the port. Your assumption is the safer reading, though I wouldn’t rely on the corrected connector section alone. Reconciling the two views and checking continuity on a real board would confirm which nets actually reach the module. Worth asking whether the documentation team plans to re-export the schematic from source rather than patch the PDF.
Are not swapped. Both labels are shifted to the right side with the MISO ending up unfortunately at the MOSI line and MOSI label being at the edge of the drawing.
