DeInit/ReInit Serial1

Good day,

I have a problem with the correct sequence of deinitialization and subsequent initialization of Serial1, with changing the state of RX and TX pins to output with level 0
(if the state of the pins is left as it is, parasitic powering of secondary circuits connected to these pins occurs).
Current code to DeInit:

    pinMode (PIN_HART_RX, OUTPUT);
    pinMode (PIN_HART_TX, OUTPUT);
    digitalWrite (PIN_HART_RX, LOW);
    digitalWrite (PIN_HART_TX, LOW);


    pinMode (PIN_HART_RX, INPUT);
    pinMode (PIN_HART_TX, OUTPUT);
    Serial1.begin(9600, SERIAL_8O1, RAK_CUSTOM_MODE);

With this code after ReInit communication not work

Get implementation for right deinit/init pins for uart from internal source code base:

    GPIO_InitTypeDef GPIO_InitStruct = {0};
    GPIO_InitStruct.Pin = PinToGPIO_Pin(UART1_TXD_PIN) | PinToGPIO_Pin(UART1_RXD_PIN);
    GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
    GPIO_InitStruct.Pull = GPIO_NOPULL;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
    GPIO_InitStruct.Pin = PinToGPIO_Pin(UART1_TXD_PIN) | PinToGPIO_Pin(UART1_RXD_PIN);
    GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
    GPIO_InitStruct.Pull = GPIO_PULLUP;
    GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
    GPIO_InitStruct.Alternate = GPIO_AF7_USART1;
    HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);

But i am found that after deinit pins and execute Serial1.end() device not going to sleep mode.
Its going after udrv_serial_deinit (SERIAL_UART1), but after this command, repeated activation of serialport (execution init pins and Serial1.begin(…)) not successful and communication not work.
Can you please provide right code sequence to reactivate serialport ?

I found whats going wrong in RUI3 library:

Inside of udrv_serial_deinit() after runing fund_circular_queue_reset() quue was setted to zero, but after udrv_serial_init() this queue not initialised and stay zero.

After disable reset this queue all work as expected


Thanks for the feedback. I will forward this to our R&D team.