Hi there, is there any plan to disclose RAK3172(LP)-SiP schematics and BOM ?
I don’t really see any reason not to do that, as I doubt there’s much differences from ST’s reference designs (as Carl Rowan pointed out on a LinkedIn post recently:There is no reason why schematic designs of modular hardware platform like RAKwireless (IoT focused) WisBlock should be closed-source.).
As firmware developer, it is important to know for example RF-switch and TCXO part numbers and connections.
Hi @TheDude ,
There is no plan to open the internals of RAK3172LP-SiP.
But for WisBlock, which is a modular hardware platform, it should be open-source since people build on top of it.
However, for the RAK3172LP-SiP, we provide the radio files for the RFswitch and TCXO enable pins that would be useful for custom FW development. This approach works (even we do not fully open the hardware) because RAK3172LP-SiP came to life from a request of a customer who needs the low power RF output path of the STM32WL.
Hi Carl,
so just to clarify and for the sake of having the information stated in one place for people that do need to control the RF-frontend by themselves:
For both RAK3172-SiP and RAK3172LP-SiP:
- The RF-switch is a SPDT controlled by PA0 and PA1 (no other IO for Power)
- PA0=1 and PA1=0 for Rx path
- PA0=0 and PA1=1 for Tx path (LP or HP depending on SiP version)
- The TCXO is powered by PB0-VDD_TCXO and should be setup to 3v0.
Then a last question:
Does the latter point implies that the SiP is not expected to work with VDDRF below 3v0 (even 3v2 as PB0 is an LDO output) ?